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0000b = 0h 0001b = 1h 0010b = 2h 0011b = 3h 0100b = 4h 0101b = 5h 0110b = 6h 0111b = 7h 1000b = 8h 1001b = 9h 1010b = Ah 1011b = Bh 1100b = Ch 1101b = Dh 1110b = Eh 1111b = Fh
In this mode, one 32-bit filter bank is used to include the following CAN frame bits into the hardware filter:
For details about activating this mode, see the data sheet, section "Acceptance Filter".
Enter the desired filter bit pattern for the 11-bit ID and 1-bit RTR, then hit the "Calculate" button.
NOTE: During arbitration, the identifiers are compared with the most significant bits firsts. If a 29-bit ID gets compared to an 11-bit ID, these 11-bits are compared to the 11 most significant bits of the 29-bit ID (bit 18 to 28).
The entries above require the following settings for the code(match) registers and the mask registers:
These registers directly correspond to the first and second data byte of the CAN frame. For details, see the data sheet, section "Single Filter Configuration".
© ESAcademy, 2000 Author: Olaf Pfeiffer
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