Back to ESAcademy Home Page


Microcontroller
Peripheral Timing
Calculator

Philips SJA1000 and 8xC591
CAN hardware acceptance filter

MODE: Single Filter, Standard Frames (11-bit)

 

Home

News

Training Classes

Products

Consulting

Technical Library

Contact Us

Reminder:
Binary to Hex table

0000b = 0h
0001b = 1h
0010b = 2h
0011b = 3h
0100b = 4h
0101b = 5h
0110b = 6h
0111b = 7h
1000b = 8h
1001b = 9h
1010b = Ah
1011b = Bh
1100b = Ch
1101b = Dh
1110b = Eh
1111b = Fh

In this mode, one 32-bit filter bank is used to include the following CAN frame bits into the hardware filter:

  • 11-bit ID (Standard ID)
  • 1-bit RTR (Remote frame)
  • 8-bit (Data byte 1)
  • 8-bit (Data byte 2)

For details about activating this mode, see the data sheet, section "Acceptance Filter".

Code(match) register ACR0 and ACR1, mask register AMR0 and AMR1

Enter the desired filter bit pattern for the 11-bit ID and 1-bit RTR, then hit the "Calculate" button.

ID.28
(ID.10)
ID.27
(ID.9)
ID.26
(ID.8)
ID.25
(ID.7)
ID.24
(ID.6)
ID.23
(ID.5)
ID.22
(ID.4)
ID.21
(ID.3)
ID.20
(ID.2)
ID.19
(ID.1)
ID.18
(ID.0)
RTR
[_ _] [_ _] [_ _]

NOTE: During arbitration, the identifiers are compared with the most significant bits firsts. If a 29-bit ID gets compared to an 11-bit ID, these 11-bits are compared to the 11 most significant bits of the 29-bit ID (bit 18 to 28).

The entries above require the following settings for the code(match) registers and the mask registers:

Description Byte AxR0 Byte AxR1
Code(match) register
(ACR0 and ACR1)
[__] [__] [__] [__]
Mask register
(AMR0 and AMR1)
[__] [__] [__] [__]

Code(match) register ACR2 and ACR3, mask register AMR2 and AMR3

These registers directly correspond to the first and second data byte of the CAN frame. For details, see the data sheet, section "Single Filter Configuration".

Upcoming Classes
   

© ESAcademy, 2000
Author: Olaf Pfeiffer

All materials
provided 'as is'
see Disclaimer

www.esacademy.com
info@esacademy.com