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Microcontroller
Peripheral Timing
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Philips SJA1000 and 8xC591
CAN hardware acceptance filter

MODE: Dual Filter, Extended Frames (29-bit)

 

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Reminder:
Binary to Hex table

0000b = 0h
0001b = 1h
0010b = 2h
0011b = 3h
0100b = 4h
0101b = 5h
0110b = 6h
0111b = 7h
1000b = 8h
1001b = 9h
1010b = Ah
1011b = Bh
1100b = Ch
1101b = Dh
1110b = Eh
1111b = Fh

In this mode, one 32-bit filter bank is used to include the following CAN frame bits into the hardware filter:

  • 1st frame: 16 most significant bits of 29-bit ID
  • 2nd frame: 16 most significant bits of 29-bit ID

For details about activating this mode, see the data sheet, section "Acceptance Filter".

Code(match) register ACR0 to ACR3, mask register AMR0 to AMR3

Enter the desired filter bit pattern for the two 11-bit IDs and 1-bit RTRs plus the 8-bit data of the first data byte, then hit the "Calculate" button. The results are given in binary, grouped into 4 bits allowing for easy translation to hexadecimal.

1st frame ID.28 ID.27 ID.26 ID.25 ID.24 ID.23 ID.22 ID.21 ID.20 ID.19 ID.18 ID.17 ID.16 ID.15 ID.14 ID.13
1st frame [_ _] [_ _] [_ _] [_
2nd frame ID.28 ID.27 ID.26 ID.25 ID.24 ID.23 ID.22 ID.21 ID.20 ID.19 ID.18 ID.17 ID.16 ID.15 ID.14 ID.13
2nd frame [_ _] [_ _] [_ _] [_

The entries above require the following settings for the code(match) registers and the mask registers:

Description Byte AxR0 Byte AxR1
Code(match) register
(ACR0 and ACR1)
[__] [__] [__] [__]
Mask register
(AMR0 and AMR1)
[__] [__] [__] [__]
  Byte AxR2 Byte AxR3
Code(match) register
(ACR2 and ACR3)
[__] [__] [__] [__]
Mask register
(AMR2 and AMR3)
[__] [__] [__] [__]
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Author: Olaf Pfeiffer

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