Microcontroller
Peripheral Timing
Calculator

The table below shows the ranges of periods possible at the clock frequency entered above.

 

	6-clock Mode (UCFG1.3 = 1)		12-clock Mode (UCFG1.3 = 0)
	Maximum	Minimum	Maximum	Minimum
PWM Counter Clock Period (us)	tpwmclk6 = 1/fclk		tpwmclk12 = 2/fclk
PWM Waveform Period (us)	tpmax6 = 1024 x tpwmclk6	tpmin6 = 1 x tpwmclk6	tpmax12 = 1024 x tpwclk12	tpmin12 = 1 x tpwclk12

The table below shows the counter reload value (CNSW) required and the compare register values for each channel. It also shows the actual periods, pulse lengths and duty cycles generated.

Calculated Register values
	6-clock Mode (UCFG1.3 = 1)	12-clock Mode (UCFG1.3 = 0)
PWM Counter Reload Value (CNSW)	cnsw6 = (tpmax/tpwmclk6) - 1	cnsw12 = (tpmax/tpwmclk12) - 1
Channel 0 Compare Value (CPSW)	cpsw06 = cnsw6 + 1 - (tpulse0/tpwmclk6) tpulse0 = dcycle0 / 100 * tp	cpsw012 = cnsw12 + 1 - (tpulse0/tpwmclk12) tpulse0 = dcycle0 / 100 * tp
Channel 1 Compare Value (CPSW)	cpsw16 = cnsw6 + 1 - (tpulse1/tpwmclk6) tpulse1 = dcycle1 / 100 * tp	cpsw112 = cnsw12 + 1 - (tpulse1/tpwmclk12) tpulse1 = dcycle1 / 100 * tp
Channel 2 Compare Value (CPSW)	cpsw26 = cnsw6 + 1 - (tpulse2/tpwmclk6) tpulse2 = dcycle2 / 100 * tp	cpsw212 = cnsw12 + 1 - (tpulse2/tpwmclk12) tpulse2 = dcycle2 / 100 * tp
Channel 3 Compare Value (CPSW)	cpsw36 = cnsw6 + 1 - (tpulse3/tpwmclk6) tpulse3 = dcycle3 / 100 * tp	cpsw312 = cnsw12 + 1 - (tpulse3/tpwmclk12) tpulse3 = dcycle3 / 100 * tp
Calculated SFR Values
	6-clock Mode (UCFG1.3 = 1)	12-clock Mode (UCFG1.3 = 0)
CNSW0 SFR Value	lower 8 bits of cnsw6	lower 8 bits of cnsw12
CNSW1 SFR Value	upper 2 bits of cnsw6	upper 2 bits of cnsw12
CPSW0 SFR Value	lower 8 bits of cpsw06	lower 8 bits of cpsw012
CPSW1 SFR Value	lower 8 bits of cpsw16	lower 8 bits of cpsw112
CPSW2 SFR Value	lower 8 bits of cpsw26	lower 8 bits of cpsw212
CPSW3 SFR Value	lower 8 bits of cpsw36	lower 8 bits of cpsw312
CPSW4 SFR Value	upper 2 bits of cpsw06, cpsw16, cpsw26, cpsw36	upper 2 bits of cpsw012, cpsw112, cpsw212, cpsw312
Calculated Period, Pulse Lengths and Duty Cycles
	6-clock Mode (UCFG1.3 = 1)	12-clock Mode (UCFG1.3 = 0)
Actual Period (us)	tpa6 = tpwmclk6 x (cnsw6 + 1)	tpa12 = tpwmclk12 x (cnsw12 + 1)
Channel 0 Actual Pulse Length (us)	tpulse0a6 = (cnsw6 - cpsw06 + 1) x tpwmclk6	tpulse0a12 = (cnsw12 - cpsw012 + 1) x tpwmclk12
Channel 1 Actual Pulse Length (us)	tpulse1a6 = (cnsw6 - cpsw16 + 1) x tpwmclk6	tpulse1a12 = (cnsw12 - cpsw112 + 1) x tpwmclk12
Channel 2 Actual Pulse Length (us)	tpulse2a6 = (cnsw6 - cpsw26 + 1) x tpwmclk6	tpulse2a12 = (cnsw12 - cpsw212 + 1) x tpwmclk12
Channel 3 Actual Pulse Length (us)	tpulse3a6 = (cnsw6 - cpsw36 + 1) x tpwmclk6	tpulse3a12 = (cnsw12 - cpsw312 + 1) x tpwmclk12
Channel 0 Actual Duty Cycle (%)	dcycle0a6 = tpulse0a6/tpa6 x 100	dcycle0a12 = tpulse0a12/tpa12 x 100
Channel 1 Actual Duty Cycle (%)	dcycle1a6 = tpulse1a6/tpa6 x 100	dcycle1a12 = tpulse1a12/tpa12 x 100
Channel 2 Actual Duty Cycle (%)	dcycle2a6 = tpulse2a6/tpa6 x 100	dcycle2a12 = tpulse2a12/tpa12 x 100
Channel 3 Actual Duty Cycle (%)	dcycle3a6 = tpulse3a6/tpa6 x 100	dcycle3a12 = tpulse3a12/tpa12 x 100